Merge pull request #27 from adafruit/raspi_spi_class_vars

fix raspi spi access of mode constants (was missing a "self")

diff --git a/src/adafruit_blinka/microcontroller/raspi_23/i2c.py b/src/adafruit_blinka/microcontroller/raspi_23/i2c.py
index edac8db010335712784ec92afdba8c7325c0b1e3..e309e9ef6ac0ae3e5db041b616ca5fb2ba463105 100644 (file)
--- a/src/adafruit_blinka/microcontroller/raspi_23/i2c.py
+++ b/src/adafruit_blinka/microcontroller/raspi_23/i2c.py
@@ -32,10 +32,35 @@ class I2C:
             found.append(addr)
         return found
 
-    def writeto(self, address, buffer, stop=True):
-        self._i2c_bus.write_bytes(address, buffer)
+    def writeto(self, address, buffer, *, start=0, end=None, stop=True):
+        if end is None:
+            end = len(buffer)
+        self._i2c_bus.write_bytes(address, buffer[start:end])
+
+    def readfrom_into(self, address, buffer, *, start=0, end=None, stop=True):
+        if end is None:
+            end = len(buffer)
+        
+        readin = self._i2c_bus.read_bytes(address, end-start)
+        for i in range(end-start):
+            buffer[i+start] = readin[i]
+
+    def writeto_then_readfrom(self, address, buffer_out, buffer_in, *,
+                       out_start=0, out_end=None,
+                       in_start=0, in_end=None, stop=False):
+        if out_end is None:
+            out_end = len(buffer_out)        
+        if in_end is None:
+            in_end = len(buffer_in)
+        if stop:
+            # To generate a stop in linux, do in two transactions
+            self.writeto(address, buffer_out, start=out_start, end=out_end, stop=True)
+            self.readfrom_into(address, buffer_in, start=in_start, end=in_end)
+        else:
+            # To generate without a stop, do in one block transaction
+            if out_end-out_start != 1:
+                raise NotImplementedError("Currently can only write a single byte in writeto_then_readfrom")
+            readin = self._i2c_bus.read_i2c_block_data(address, buffer_out[out_start:out_end][0], in_end-in_start)
+            for i in range(in_end-in_start):
+                buffer_in[i+in_start] = readin[i]
 
-    def readfrom_into(self, address, buffer, stop=True):
-        readin = self._i2c_bus.read_bytes(address, len(buffer))
-        for i in range(len(buffer)):
-            buffer[i] = readin[i]

diff --git a/src/busio.py b/src/busio.py
index 69cbca03a3300c59a2064b849193096c8a91e15f..72f3c7a66627e58f2c9eee4981112131fe4ddd73 100755 (executable)
--- a/src/busio.py
+++ b/src/busio.py
@@ -44,7 +44,7 @@ class I2C(Lockable):
     def scan(self):
         return self._i2c.scan()
 
-    def readfrom_into(self, address, buffer, start=0, end=None):
+    def readfrom_into(self, address, buffer, *, start=0, end=None):
         if start is not 0 or end is not None:
             if end is None:
                 end = len(buffer)
@@ -52,7 +52,7 @@ class I2C(Lockable):
         stop = True  # remove for efficiency later
         return self._i2c.readfrom_into(address, buffer, stop)
 
-    def writeto(self, address, buffer, start=0, end=None, stop=True):
+    def writeto(self, address, buffer, *, start=0, end=None, stop=True):
         if isinstance(buffer, str):
             buffer = bytes([ord(x) for x in buffer])
         if start is not 0 or end is not None:
@@ -62,6 +62,8 @@ class I2C(Lockable):
                 return self._i2c.writeto(address, memoryview(buffer)[start:end], stop)
         return self._i2c.writeto(address, buffer, stop)
 
+    def writeto_then_readfrom(self, address, buffer_out, buffer_in, *, out_start=0, out_end=None, in_start=0, in_end=None, stop=False):
+        return self._i2c.writeto_then_readfrom(address, buffer_out, buffer_in, out_start, out_end, in_start, in_end, stop)
 
 class SPI(Lockable):
     def __init__(self, clock, MOSI=None, MISO=None):
@@ -72,7 +74,9 @@ class SPI(Lockable):
             from machine import SPI as _SPI
         from microcontroller.pin import spiPorts
         for portId, portSck, portMosi, portMiso in spiPorts:
-            if clock == portSck and MOSI == portMosi and MISO == portMiso:
+            if ((clock == portSck) and                   # Clock is required!
+                (MOSI == portMosi or MOSI == None) and   # But can do with just output
+                (MISO == portMiso or MISO == None)):      # Or just input
                 self._spi = _SPI(portId)
                 self._pins = (portSck, portMosi, portMiso)
                 break