refine pin namings

diff --git a/src/adafruit_blinka/board/beaglebone_pocketbeagle.py b/src/adafruit_blinka/board/beaglebone_pocketbeagle.py
index 454e8049585fb23b5c12e9d174d6c06bed7519f9..a56e5f7c467de6fd59ff527c70b15f3973c06f96 100644 (file)
--- a/src/adafruit_blinka/board/beaglebone_pocketbeagle.py
+++ b/src/adafruit_blinka/board/beaglebone_pocketbeagle.py
@@ -94,77 +94,45 @@ LED_USR3 = pin.USR3
 # https://raw.githubusercontent.com/wiki/beagleboard/pocketbeagle/images/PocketBeagle_pinout.png
 
 # I2C1 pins
 # https://raw.githubusercontent.com/wiki/beagleboard/pocketbeagle/images/PocketBeagle_pinout.png
 
 # I2C1 pins

-# P2_11 (I2C1_SDA => SDA_1) data signal
-# P2_9 (I2C1_SCL => SCL_1) clock signal
-SDA_1 = pin.P2_11
-SCL_1 = pin.P2_9
-# for Example compatibility
+SDA_1 = pin.I2C1_SDA    # P2_11 data signal
+SCL_1 = pin.I2C1_SCL    # P2_9 clock signal
+# for example compatibility we create a alias

 SDA = SDA_1
 SCL = SCL_1
 
 SDA = SDA_1
 SCL = SCL_1
 

-

 # I2C2 pins
 # I2C2 pins

-# P1_26 (I2C2_SDA => SDA_2) data signal
-# P1_28 (I2C2_SCL => SCL_2) clock signal
-SDA_2 = pin.P1_26
-SCL_2 = pin.P1_28
+SDA_2 = pin.I2C2_SDA    # P1_26 data signal
+SCL_2 = pin.I2C2_SCL    # P1_28 clock signal

 
 # SPI0 pins
 
 # SPI0 pins

-# P1_6 (SPI0_CSO => CE0) enables peripheral device
-# P1_12 (SPI0_MOSI => MOSI) outputs data to peripheral device
-# P1_10 (SPIO_MISO => MISO) receives data from peripheral device
-# P1_8 (SPI0_CLK => SCLK) outputs clock signal
-CE0 = pin.P1_6
-MOSI = pin.P1_12
-MISO = pin.P1_10
-SCLK = pin.P1_8
+CE0 = pin.SPI0_CS0      # P1_6 - enables peripheral device
+SCLK = pin.SPI0_SCLK    # P1_12 - outputs data to peripheral device
+MOSI = pin.SPI0_D1      # P1_10 - receives data from peripheral device
+MISO = pin.SPI0_D0      # P1_8 - outputs clock signal

 # CircuitPython naming convention for SPI Clock
 SCK = SCLK
 
 # SPI1 pins
 # CircuitPython naming convention for SPI Clock
 SCK = SCLK
 
 # SPI1 pins

-# P2_31 (SPI1_CS1 => CE1) enables peripheral device
-# P2_25 (SPI1_MOSI => MOSI) outputs data to peripheral device
-# P2_27 (SPI1_MISO => MISO) receives data from peripheral device
-# P2_29 (SPI1_CLK => SCLK) outputs clock signal
-CE1 = pin.P2_31
-MOSI_1 = pin.P2_25
-MISO_1 = pin.P2_27
-SCLK_1 = pin.P2_29
+CE0_1 = pin.SPI1_CS1    # P2_31 - enables peripheral device
+SCLK_1 = pin.SPI1_SCLK  # P2_25 - outputs data to peripheral device
+MOSI_1 = pin.SPI1_D1    # P2_27 - receives data from peripheral device
+MISO_1 = pin.SPI1_D0    # P2_29 - outputs clock signal

 # CircuitPython naming convention for SPI Clock
 SCK_1 = SCLK_1
 
 
 # UART0
 # CircuitPython naming convention for SPI Clock
 SCK_1 = SCLK_1
 
 
 # UART0

-TX_0 = pin.P1_30
-RX_0 = pin.P1_32
-
+TX_0 = pin.UART0_TXD    # P1_30
+RX_0 = pin.UART0_RXD    # P1_32
+# create alias for most of the examples

 TX = TX_0
 RX = RX_0
 
 TX = TX_0
 RX = RX_0
 

-

 # UART2
 # pins already in use by SPI0
 # UART2
 # pins already in use by SPI0

-# TX_2 = pin.P1_8
-# RX_2 = pin.P1_10
+# TX_2 = pin.UART2_TXD    # P1_8
+# RX_2 = pin.UART2_RXD    # P1_10

 
 # UART4
 
 # UART4

-TX_4 = pin.P2_7
-RX_4 = pin.P2_5
-
-
-# ordered as spiId, sckId, mosiId, misoId
-spiPorts = (
-    (0, SCLK, MOSI, MISO),
-    (1, SCLK_1, MOSI_1, MISO_1),
-)
-
-# ordered as uartId, txId, rxId
-uartPorts = (
-    (0, TX_0, RX_0),
-    (4, TX_4, RX_4),
-)
-
-i2cPorts = (
-    (1, SCL_1, SDA_1),
-    (2, SCL_2, SDA_2),
-)
+TX_4 = pin.UART4_TXD    # P2_7
+RX_4 = pin.UART4_RXD    # P2_5

diff --git a/src/adafruit_blinka/microcontroller/am335x/pin.py b/src/adafruit_blinka/microcontroller/am335x/pin.py
index 22f7071d7a3adc2204bdfe4f410a374c7f2f1afd..f8c1649b115c08fe1dc767e6acd3fdefd42c0d78 100644 (file)
--- a/src/adafruit_blinka/microcontroller/am335x/pin.py
+++ b/src/adafruit_blinka/microcontroller/am335x/pin.py
@@ -232,38 +232,114 @@ P9_42 = Pin('P9_42')    # GPIO0_7 - GPIO_7
 # P9_45 = DGND          # DGND - GPIO_0
 # P9_46 = DGND          # DGND - GPIO_0
 
 # P9_45 = DGND          # DGND - GPIO_0
 # P9_46 = DGND          # DGND - GPIO_0
 

+
+##########################################

 # common to all beagles
 USR0 = Pin('USR0')      # USR0 - GPIO_53
 USR1 = Pin('USR1')      # USR1 - GPIO_54
 USR2 = Pin('USR2')      # USR2 - GPIO_55
 USR3 = Pin('USR3')      # USR3 - GPIO_56
 
 # common to all beagles
 USR0 = Pin('USR0')      # USR0 - GPIO_53
 USR1 = Pin('USR1')      # USR1 - GPIO_54
 USR2 = Pin('USR2')      # USR2 - GPIO_55
 USR3 = Pin('USR3')      # USR3 - GPIO_56
 

-# all special functions (SPI / I2C) are moved to
-# src/adafruit_blinka/board/beaglebone_black.py
-# → this does not work - as the busio thing wants
-# this lists in the microcontroller file..
+
+##########################################
+# specials
+
+# analog input
+AIN0 = Pin('AIN0')
+AIN1 = Pin('AIN1')
+AIN2 = Pin('AIN2')
+AIN3 = Pin('AIN3')
+AIN4 = Pin('AIN4')
+AIN5 = Pin('AIN5')
+AIN6 = Pin('AIN6')
+AIN7 = Pin('AIN7')
+
+# PWM
+EHRPWM0A = Pin('EHRPWM0A')
+EHRPWM0B = Pin('EHRPWM0B')
+EHRPWM1A = Pin('EHRPWM1A')
+EHRPWM1B = Pin('EHRPWM1B')
+EHRPWM2A = Pin('EHRPWM2A')
+EHRPWM2B = Pin('EHRPWM2B')
+ECAPPWM0 = Pin('ECAPPWM0')
+ECAPPWM2 = Pin('ECAPPWM2')
+TIMER4 = Pin('TIMER4')
+TIMER5 = Pin('TIMER5')
+TIMER6 = Pin('TIMER6')
+TIMER7 = Pin('TIMER7')
+
+
+# I2C1
+I2C1_SDA = Pin('I2C1_SDA')
+I2C1_SCL = Pin('I2C1_SCL')
+
+# I2C2
+I2C2_SDA = Pin('I2C2_SDA')
+I2C2_SCL = Pin('I2C2_SCL')
+
+# SPI0
+SPI0_CS0 = Pin('SPI0_CS0')
+SPI0_SCLK = Pin('SPI0_SCLK')
+SPI0_D1 = Pin('SPI0_D1')
+SPI0_D0 = Pin('SPI0_D0')
+
+# SPI1
+SPI1_CS0 = Pin('SPI1_CS0')
+SPI1_CS1 = Pin('SPI1_CS1')
+SPI1_SCLK = Pin('SPI1_SCLK')
+SPI1_D1 = Pin('SPI1_D1')
+SPI1_D0 = Pin('SPI1_D0')
+
+# UART0
+UART0_TXD = Pin('UART0_TXD')
+UART0_RXD = Pin('UART0_RXD')
+
+# UART1
+UART1_TXD = Pin('UART1_TXD')
+UART1_RXD = Pin('UART1_RXD')
+UART1_RTSn = Pin('UART1_RTSn')
+UART1_CTSn = Pin('UART1_CTSn')
+
+# UART2
+UART2_TXD = Pin('UART2_TXD')
+UART2_RXD = Pin('UART2_RXD')
+
+# UART3
+UART3_TXD = Pin('UART3_TXD')
+UART3_RXD = Pin('UART3_RXD')
+UART3_RTSn = Pin('UART3_RTSn')
+UART3_CTSn = Pin('UART3_CTSn')
+
+# UART4
+UART4_TXD = Pin('UART4_TXD')
+UART4_RXD = Pin('UART4_RXD')
+UART4_RTSn = Pin('UART4_RTSn')
+UART4_CTSn = Pin('UART4_CTSn')
+
+# UART5
+UART5_TXD = Pin('UART5_TXD')
+UART5_RXD = Pin('UART5_RXD')
+UART5_RTSn = Pin('UART5_RTSn')
+UART5_CTSn = Pin('UART5_CTSn')
+

 
 # ordered as spiId, sckId, mosiId, misoId
 spiPorts = (
 
 # ordered as spiId, sckId, mosiId, misoId
 spiPorts = (

-    # (0, Pin('SPI0_SCLK'), Pin('SPI0_D1'), Pin('SPI0_D0')),
-    # (1, Pin('SPI1_SCLK'), Pin('SPI1_D1'), Pin('SPI1_D0')),
-    (1, P1_8, P1_12, P1_10),
-    (1, P2_29, P2_25, P2_27),
+    (0, SPI0_SCLK, SPI0_D1, SPI0_D0),
+    (1, SPI1_SCLK, SPI1_D1, SPI1_D0),

 )
 
 # ordered as uartId, txId, rxId
 uartPorts = (
 )
 
 # ordered as uartId, txId, rxId
 uartPorts = (

-    # (0, Pin('UART0_TXD'), Pin('UART0_RXD')),
-    # (1, Pin('UART1_TXD'), Pin('UART1_RXD')),
-    # (2, Pin('UART2_TXD'), Pin('UART2_RXD')),
-    # (4, Pin('UART4_TXD'), Pin('UART4_RXD')),
-    # (5, Pin('UART5_TXD'), Pin('UART5_RXD')),
+    # (0, UART0_TXD, UART0_RXD),
+    # (1, UART1_TXD, UART1_RXD),
+    # (2, UART2_TXD, UART2_RXD),
+    # (4, UART4_TXD, UART4_RXD),
+    # (5, UART5_TXD, UART5_RXD),

 )
 
 # ordered as i2cId, SCL, SDA
 i2cPorts = (
 )
 
 # ordered as i2cId, SCL, SDA
 i2cPorts = (

-    # (1, Pin('I2C1_SCL'), Pin('I2C1_SDA')),
-    # (2, Pin('I2C2_SCL'), Pin('I2C2_SDA')),
-    (1, P2_9, P2_11),
-    (2, P1_28, P1_26),
+    (1, I2C1_SCL, I2C1_SDA),
+    (2, I2C2_SCL, I2C2_SDA),

 )
 )