microcontroller: rk3588: define every pinmux possible for all protocols

Before this, only used pins for the Radxa and some other brands
were defined, which does not include every mux possiblities.

Other boards will find hard time to include thier board into
this. For that reason, defining every possibility.

Signed-off-by: djkabutar <d.kabutarwala@yahoo.com>

diff --git a/src/adafruit_blinka/microcontroller/rockchip/rk3588/pin.py b/src/adafruit_blinka/microcontroller/rockchip/rk3588/pin.py
index 3abb3b808abea5bd094a253215857f8ca5c6dc92..7f22cb525d910e6f7ecc3eab2eca35e1f8aacb30 100644 (file)
--- a/src/adafruit_blinka/microcontroller/rockchip/rk3588/pin.py
+++ b/src/adafruit_blinka/microcontroller/rockchip/rk3588/pin.py
@@ -175,79 +175,246 @@ GPIO4_D7 = Pin((4, 31))
 
 
 # UART
+UART0_TX_M0 = GPIO0_C5
+UART0_RX_M0 = GPIO0_C4
+UART0_TX_M1 = GPIO0_B1
+UART0_RX_M1 = GPIO0_B0
 UART0_TX_M2 = GPIO4_A3
 UART0_RX_M2 = GPIO4_A4
+UART1_TX_M0 = GPIO2_B7
+UART1_RX_M0 = GPIO2_B6
 UART1_TX_M1 = GPIO1_B6
 UART1_RX_M1 = GPIO1_B7
+UART1_TX_M2 = GPIO0_D1
+UART1_RX_M2 = GPIO0_D2
 UART2_TX_M0 = GPIO0_B5
 UART2_RX_M0 = GPIO0_B6
+UART2_TX_M1 = GPIO0_D0
+UART2_RX_M1 = GPIO0_D1
 UART2_TX_M2 = GPIO3_B1
 UART2_RX_M2 = GPIO3_B2
 UART3_TX_M0 = GPIO1_C1
 UART3_RX_M0 = GPIO1_C0
 UART3_TX_M1 = GPIO3_B5
 UART3_RX_M1 = GPIO3_B6
+UART3_TX_M2 = GPIO4_A5
+UART3_RX_M2 = GPIO4_A6
+UART4_TX_M0 = GPIO1_D2
+UART4_RX_M0 = GPIO1_D3
+UART4_TX_M1 = GPIO3_D1
+UART4_RX_M1 = GPIO3_D0
 UART4_TX_M2 = GPIO1_B3
 UART4_RX_M2 = GPIO1_B2
+UART5_TX_M0 = GPIO4_D5
+UART5_RX_M0 = GPIO4_D4
+UART5_TX_M1 = GPIO3_C4
+UART5_RX_M1 = GPIO3_C5
+UART5_TX_M2 = GPIO2_D5
+UART5_RX_M2 = GPIO2_D4
+UART6_TX_M0 = GPIO2_A7
+UART6_RX_M0 = GPIO2_A6
+UART6_TX_M1 = GPIO1_A1
+UART6_RX_M1 = GPIO1_A0
+UART6_TX_M2 = GPIO1_D0
+UART6_RX_M2 = GPIO1_D1
+UART7_TX_M0 = GPIO2_B5
+UART7_RX_M0 = GPIO2_B4
 UART7_TX_M1 = GPIO3_C0
 UART7_RX_M1 = GPIO3_C1
 UART7_TX_M2 = GPIO1_B5
 UART7_RX_M2 = GPIO1_B4
+UART8_TX_M0 = GPIO4_B0
+UART8_RX_M0 = GPIO4_B1
+UART8_TX_M1 = GPIO3_A2
+UART8_RX_M1 = GPIO3_A3
+UART9_TX_M0 = GPIO2_C2
+UART9_RX_M0 = GPIO2_C4
+UART9_TX_M1 = GPIO4_B4
+UART9_RX_M1 = GPIO4_B5
+UART9_TX_M2 = GPIO3_D5
+UART9_RX_M2 = GPIO3_D4
 
 # ordered as uartId, txId, rxId
 uartPorts = (
+    (0, UART0_TX_M0, UART0_RX_M0),
+    (0, UART0_TX_M1, UART0_RX_M1),
     (0, UART0_TX_M2, UART0_RX_M2),
+    (1, UART1_TX_M0, UART1_RX_M0),
     (1, UART1_TX_M1, UART1_RX_M1),
+    (1, UART1_TX_M2, UART1_RX_M2),
     (2, UART2_TX_M0, UART2_RX_M0),
+    (2, UART2_TX_M1, UART2_RX_M1),
     (2, UART2_TX_M2, UART2_RX_M2),
     (3, UART3_TX_M0, UART3_RX_M0),
     (3, UART3_TX_M1, UART3_RX_M1),
+    (3, UART3_TX_M2, UART3_RX_M2),
+    (4, UART4_TX_M0, UART4_RX_M0),
+    (4, UART4_TX_M1, UART4_RX_M1),
     (4, UART4_TX_M2, UART4_RX_M2),
+    (5, UART5_TX_M0, UART5_RX_M0),
+    (5, UART5_TX_M1, UART5_RX_M1),
+    (5, UART5_TX_M2, UART5_RX_M2),
+    (6, UART6_TX_M0, UART6_RX_M0),
+    (6, UART6_TX_M1, UART6_RX_M1),
+    (6, UART6_TX_M2, UART6_RX_M2),
+    (7, UART7_TX_M0, UART7_RX_M0),
     (7, UART7_TX_M1, UART7_RX_M1),
     (7, UART7_TX_M2, UART7_RX_M2),
+    (8, UART8_TX_M0, UART8_RX_M0),
+    (8, UART8_TX_M1, UART8_RX_M1),
+    (9, UART9_TX_M0, UART9_RX_M0),
+    (9, UART9_TX_M1, UART9_RX_M1),
+    (9, UART9_TX_M2, UART9_RX_M2),
 )
 
 
 # I2C
+I2C0_SCL_M0 = GPIO0_B3
+I2C0_SDA_M0 = GPIO0_A6
 I2C0_SCL_M1 = GPIO4_C5
 I2C0_SDA_M1 = GPIO4_C6
+I2C0_SCL_M2 = GPIO0_D1
+I2C0_SDA_M2 = GPIO0_D2
 I2C1_SCL_M0 = GPIO0_B5
 I2C1_SDA_M0 = GPIO0_B6
+I2C1_SCL_M1 = GPIO0_B0
+I2C1_SDA_M1 = GPIO0_B1
+I2C1_SCL_M2 = GPIO0_D4
+I2C1_SDA_M2 = GPIO0_D5
+I2C1_SCL_M3 = GPIO2_D4
+I2C1_SDA_M3 = GPIO2_D5
 I2C1_SCL_M4 = GPIO1_B1
 I2C1_SDA_M4 = GPIO1_B2
+I2C2_SCL_M0 = GPIO0_B7
+I2C2_SDA_M0 = GPIO0_C0
+I2C2_SCL_M1 = GPIO2_C1
+I2C2_SDA_M1 = GPIO2_C0
+I2C2_SCL_M2 = GPIO2_A3
+I2C2_SDA_M2 = GPIO2_A2
+I2C2_SCL_M3 = GPIO1_C5
+I2C2_SDA_M3 = GPIO1_C4
+I2C2_SCL_M4 = GPIO1_A1
+I2C2_SDA_M4 = GPIO1_A0
 I2C3_SCL_M0 = GPIO1_C1
 I2C3_SDA_M0 = GPIO1_C0
 I2C3_SCL_M1 = GPIO3_B7
 I2C3_SDA_M1 = GPIO3_C0
+I2C3_SCL_M2 = GPIO4_A4
+I2C3_SDA_M2 = GPIO4_A5
+I2C3_SCL_M3 = GPIO2_B2
+I2C3_SDA_M3 = GPIO2_B3
+I2C3_SCL_M4 = GPIO4_D0
+I2C3_SDA_M4 = GPIO4_D1
+I2C4_SCL_M0 = GPIO3_A6
+I2C4_SDA_M0 = GPIO3_A5
+I2C4_SCL_M1 = GPIO2_B5
+I2C4_SDA_M1 = GPIO2_B4
+I2C4_SCL_M2 = GPIO0_C5
+I2C4_SDA_M2 = GPIO0_C4
 I2C4_SCL_M3 = GPIO1_A3
 I2C4_SDA_M3 = GPIO1_A2
+I2C4_SCL_M4 = GPIO1_C7
+I2C4_SDA_M4 = GPIO1_C6
+I2C5_SCL_M0 = GPIO3_C7
+I2C5_SDA_M0 = GPIO3_D0
+I2C5_SCL_M1 = GPIO4_B6
+I2C5_SDA_M1 = GPIO4_B7
+I2C5_SCL_M2 = GPIO4_A6
+I2C5_SDA_M2 = GPIO4_A7
+I2C5_SCL_M3 = GPIO1_B6
+I2C5_SDA_M3 = GPIO1_B7
+I2C5_SCL_M4 = GPIO2_B6
+I2C5_SDA_M4 = GPIO2_B7
+I2C6_SCL_M0 = GPIO0_D0
+I2C6_SDA_M0 = GPIO0_C7
+I2C6_SCL_M1 = GPIO1_C3
+I2C6_SDA_M1 = GPIO1_C2
+I2C6_SCL_M2 = GPIO2_C3
+I2C6_SDA_M2 = GPIO2_C2
 I2C6_SCL_M3 = GPIO4_B1
 I2C6_SDA_M3 = GPIO4_B0
+I2C6_SCL_M4 = GPIO3_A1
+I2C6_SDA_M4 = GPIO3_A0
+I2C7_SCL_M0 = GPIO1_D0
+I2C7_SDA_M0 = GPIO1_D1
+I2C7_SCL_M1 = GPIO4_C3
+I2C7_SDA_M1 = GPIO4_C4
+I2C7_SCL_M2 = GPIO3_D2
+I2C7_SDA_M2 = GPIO3_D3
 I2C7_SCL_M3 = GPIO4_B2
 I2C7_SDA_M3 = GPIO4_B3
+I2C8_SCL_M0 = GPIO4_D2
+I2C8_SDA_M0 = GPIO4_D3
+I2C8_SCL_M1 = GPIO2_B0
+I2C8_SDA_M1 = GPIO2_B1
 I2C8_SCL_M2 = GPIO1_D6
 I2C8_SDA_M2 = GPIO1_D7
+I2C8_SCL_M3 = GPIO4_C0
+I2C8_SDA_M3 = GPIO4_C1
 I2C8_SCL_M4 = GPIO3_C2
 I2C8_SDA_M4 = GPIO3_C3
-I2C5_SDA_M3 = GPIO1_B7
-I2C5_SCL_M3 = GPIO1_B6
 
 # ordered as i2cId, sclId, sdaId
 i2cPorts = (
+    (0, I2C0_SCL_M0, I2C0_SDA_M0),
     (0, I2C0_SCL_M1, I2C0_SDA_M1),
+    (0, I2C0_SCL_M2, I2C0_SDA_M2),
     (1, I2C1_SCL_M0, I2C1_SDA_M0),
+    (1, I2C1_SCL_M1, I2C1_SDA_M1),
+    (1, I2C1_SCL_M2, I2C1_SDA_M2),
+    (1, I2C1_SCL_M3, I2C1_SDA_M3),
     (1, I2C1_SCL_M4, I2C1_SDA_M4),
+    (2, I2C2_SCL_M0, I2C2_SDA_M0),
+    (2, I2C2_SCL_M1, I2C2_SDA_M1),
+    (2, I2C2_SCL_M2, I2C2_SDA_M2),
+    (2, I2C2_SCL_M3, I2C2_SDA_M3),
+    (2, I2C2_SCL_M4, I2C2_SDA_M4),
     (3, I2C3_SCL_M0, I2C3_SDA_M0),
     (3, I2C3_SCL_M1, I2C3_SDA_M1),
+    (3, I2C3_SCL_M2, I2C3_SDA_M2),
+    (3, I2C3_SCL_M3, I2C3_SDA_M3),
+    (3, I2C3_SCL_M4, I2C3_SDA_M4),
+    (4, I2C4_SCL_M0, I2C4_SDA_M0),
+    (4, I2C4_SCL_M1, I2C4_SDA_M1),
+    (4, I2C4_SCL_M2, I2C4_SDA_M2),
     (4, I2C4_SCL_M3, I2C4_SDA_M3),
+    (4, I2C4_SCL_M4, I2C4_SDA_M4),
+    (5, I2C5_SCL_M0, I2C5_SDA_M0),
+    (5, I2C5_SCL_M1, I2C5_SDA_M1),
+    (5, I2C5_SCL_M2, I2C5_SDA_M2),
     (5, I2C5_SCL_M3, I2C5_SDA_M3),
+    (5, I2C5_SCL_M4, I2C5_SDA_M4),
+    (6, I2C6_SCL_M0, I2C6_SDA_M0),
+    (6, I2C6_SCL_M1, I2C6_SDA_M1),
+    (6, I2C6_SCL_M2, I2C6_SDA_M2),
     (6, I2C6_SCL_M3, I2C6_SDA_M3),
+    (6, I2C6_SCL_M4, I2C6_SDA_M4),
+    (7, I2C7_SCL_M0, I2C7_SDA_M0),
+    (7, I2C7_SCL_M1, I2C7_SDA_M1),
+    (7, I2C7_SCL_M2, I2C7_SDA_M2),
     (7, I2C7_SCL_M3, I2C7_SDA_M3),
+    (8, I2C8_SCL_M0, I2C8_SDA_M0),
+    (8, I2C8_SCL_M1, I2C8_SDA_M1),
     (8, I2C8_SCL_M2, I2C8_SDA_M2),
+    (8, I2C8_SCL_M3, I2C8_SDA_M3),
     (8, I2C8_SCL_M4, I2C8_SDA_M4),
 )
 
 # SPI
+SPI0_MOSI_M0 = GPIO0_C0
+SPI0_MISO_M0 = GPIO0_C7
+SPI0_CLK_M0 = GPIO0_C6
+SPI0_SCLK_M0 = SPI0_CLK_M0
+SPI0_CS0_M0 = GPIO0_D1
+SPI0_CS1_M0 = GPIO0_B7
+
+SPI0_MOSI_M1 = GPIO4_A1
+SPI0_MISO_M1 = GPIO4_A0
+SPI0_CLK_M1 = GPIO4_A2
+SPI0_SCLK_M1 = SPI0_CLK_M1
+SPI0_CS0_M1 = GPIO4_B2
+SPI0_CS1_M1 = GPIO4_B1
+
 SPI0_MOSI_M2 = GPIO1_B2
 SPI0_MISO_M2 = GPIO1_B1
 SPI0_CLK_M2 = GPIO1_B3
@@ -255,10 +422,19 @@ SPI0_SCLK_M2 = SPI0_CLK_M2
 SPI0_CS0_M2 = GPIO1_B4
 SPI0_CS1_M2 = GPIO1_B5
 
-SPI0_MOSI_M1 = GPIO4_A1
-SPI0_MISO_M1 = GPIO4_A0
-SPI0_SCLK_M1 = GPIO4_A2
-SPI0_CS0_M1 = GPIO4_B2
+SPI0_MOSI_M3 = GPIO3_D2
+SPI0_MISO_M3 = GPIO3_D1
+SPI0_CLK_M3 = GPIO3_D3
+SPI0_SCLK_M3 = SPI0_CLK_M3
+SPI0_CS0_M3 = GPIO3_D4
+SPI0_CS1_M3 = GPIO3_D5
+
+SPI1_MOSI_M0 = GPIO2_C2
+SPI1_MISO_M0 = GPIO2_C1
+SPI1_CLK_M0 = GPIO2_C0
+SPI1_SCLK_M0 = SPI1_CLK_M0
+SPI1_CS0_M0 = GPIO2_C3
+SPI1_CS1_M0 = GPIO2_C4
 
 SPI1_MOSI_M1 = GPIO3_B7
 SPI1_MISO_M1 = GPIO3_C0
@@ -267,61 +443,214 @@ SPI1_SCLK_M1 = SPI1_CLK_M1
 SPI1_CS0_M1 = GPIO3_C2
 SPI1_CS1_M1 = GPIO3_C3
 
-SPI3_MISO_M0 = GPIO4_C4
-SPI3_MOSI_M0 = GPIO4_C5
+SPI1_MOSI_M2 = GPIO1_D1
+SPI1_MISO_M2 = GPIO1_D0
+SPI1_CLK_M2 = GPIO1_D2
+SPI1_SCLK_M2 = SPI1_CLK_M2
+SPI1_CS0_M2 = GPIO1_D3
+SPI1_CS1_M2 = GPIO1_D5
+
+SPI2_MOSI_M0 = GPIO1_A5
+SPI2_MISO_M0 = GPIO1_A4
+SPI2_CLK_M0 = GPIO1_A6
+SPI2_SCLK_M0 = SPI2_CLK_M0
+SPI2_CS0_M0 = GPIO1_A7
+SPI2_CS1_M0 = GPIO1_B0
+
+SPI2_MOSI_M1 = GPIO4_A5
+SPI2_MISO_M1 = GPIO4_A4
+SPI2_CLK_M1 = GPIO4_A6
+SPI2_SCLK_M1 = SPI2_CLK_M1
+SPI2_CS0_M1 = GPIO4_A7
+SPI2_CS1_M1 = GPIO4_B0
+
+SPI2_MOSI_M2 = GPIO0_A6
+SPI2_MISO_M2 = GPIO0_B3
+SPI2_CLK_M2 = GPIO0_A5
+SPI2_SCLK_M2 = SPI2_CLK_M2
+SPI2_CS0_M2 = GPIO0_B1
+SPI2_CS1_M2 = GPIO0_B0
+
+SPI3_MOSI_M0 = GPIO4_C4
+SPI3_MISO_M0 = GPIO4_C5
 SPI3_SCK_M0 = GPIO4_C6
 SPI3_SCLK_M0 = SPI3_SCK_M0
+SPI3_CS0_M0 = GPIO4_C2
+SPI3_CS1_M0 = GPIO4_C3
+
+SPI3_MOSI_M1 = GPIO4_B6
+SPI3_MISO_M1 = GPIO4_B5
+SPI3_SCK_M1 = GPIO4_B7
+SPI3_SCLK_M1 = SPI3_SCK_M1
+SPI3_CS0_M1 = GPIO4_C0
+SPI3_CS1_M1 = GPIO4_C1
+
+SPI3_MOSI_M2 = GPIO0_D2
+SPI3_MISO_M2 = GPIO0_D0
+SPI3_SCK_M2 = GPIO0_D3
+SPI3_SCLK_M2 = SPI3_SCK_M2
+SPI3_CS0_M2 = GPIO0_D4
+SPI3_CS1_M2 = GPIO0_D5
+
+SPI3_MOSI_M3 = GPIO3_C7
+SPI3_MISO_M3 = GPIO3_C6
+SPI3_SCK_M3 = GPIO3_D0
+SPI3_SCLK_M3 = SPI3_SCK_M3
+SPI3_CS0_M3 = GPIO3_C4
+SPI3_CS1_M3 = GPIO3_C5
 
-SPI4_MISO_M0 = GPIO1_C0
 SPI4_MOSI_M0 = GPIO1_C1
+SPI4_MISO_M0 = GPIO1_C0
 SPI4_SCK_M0 = GPIO1_C2
 SPI4_SCLK_M0 = SPI4_SCK_M0
+SPI4_CS0_M0 = GPIO1_C3
+SPI4_CS1_M0 = GPIO1_C4
+
+SPI4_MOSI_M1 = GPIO3_A1
+SPI4_MISO_M1 = GPIO3_A0
+SPI4_SCK_M1 = GPIO3_A2
+SPI4_SCLK_M1 = SPI4_SCK_M1
+SPI4_CS0_M1 = GPIO3_A3
+SPI4_CS1_M1 = GPIO3_A4
+
+SPI4_MOSI_M2 = GPIO1_A1
+SPI4_MISO_M2 = GPIO1_A0
+SPI4_SCK_M2 = GPIO1_A2
+SPI4_SCLK_M2 = SPI4_SCK_M2
+SPI4_CS0_M2 = GPIO1_A3
 
 # ordered as spiId, sckId, mosiId, misoId
 spiPorts = (
-    (0, SPI0_SCLK_M2, SPI0_MOSI_M2, SPI0_MISO_M2),
+    (0, SPI0_SCLK_M0, SPI0_MOSI_M0, SPI0_MISO_M0),
     (0, SPI0_SCLK_M1, SPI0_MOSI_M1, SPI0_MISO_M1),
+    (0, SPI0_SCLK_M2, SPI0_MOSI_M2, SPI0_MISO_M2),
+    (0, SPI0_SCLK_M3, SPI0_MOSI_M3, SPI0_MISO_M3),
+    (1, SPI1_SCLK_M0, SPI1_MOSI_M0, SPI1_MISO_M0),
     (1, SPI1_SCLK_M1, SPI1_MOSI_M1, SPI1_MISO_M1),
+    (1, SPI1_SCLK_M2, SPI1_MOSI_M2, SPI1_MISO_M2),
+    (2, SPI2_SCLK_M0, SPI2_MOSI_M0, SPI2_MISO_M0),
+    (2, SPI2_SCLK_M1, SPI2_MOSI_M1, SPI2_MISO_M1),
+    (2, SPI2_SCLK_M2, SPI2_MOSI_M2, SPI2_MISO_M2),
     (3, SPI3_SCLK_M0, SPI3_MOSI_M0, SPI3_MISO_M0),
+    (3, SPI3_SCLK_M1, SPI3_MOSI_M1, SPI3_MISO_M1),
+    (3, SPI3_SCLK_M2, SPI3_MOSI_M2, SPI3_MISO_M2),
+    (3, SPI3_SCLK_M3, SPI3_MOSI_M3, SPI3_MISO_M3),
     (4, SPI4_SCLK_M0, SPI4_MOSI_M0, SPI4_MISO_M0),
+    (4, SPI4_SCLK_M1, SPI4_MOSI_M1, SPI4_MISO_M1),
+    (4, SPI4_SCLK_M2, SPI4_MOSI_M2, SPI4_MISO_M2),
 )
 
 # PWM
+PWM0_M0 = GPIO0_D2
+PWM0_M1 = GPIO1_D2
 PWM0_M2 = GPIO1_A2
+PWM1_M0 = GPIO0_C0
+PWM1_M1 = GPIO0_D3
 PWM1_M2 = GPIO1_A3
+PWM2_M0 = GPIO0_C4
 PWM2_M1 = GPIO3_B1
+PWM2_M2 = GPIO4_C2
+PWM3_IR_M0 = GPIO0_D4
 PWM3_IR_M1 = GPIO3_B2
+PWM3_IR_M2 = GPIO1_C2
+PWM3_IR_M3 = GPIO1_A7
+PWM3_M0 = PWM3_IR_M0
+PWM3_M1 = PWM3_IR_M1
+PWM3_M2 = PWM3_IR_M2
+PWM3_M3 = PWM3_IR_M3
+PWM4_M0 = GPIO0_C5
+PWM4_M1 = GPIO4_C3
+PWM5_M0 = GPIO0_C6
+PWM5_M1 = GPIO0_C6
 PWM5_M2 = GPIO4_C4
+PWM6_M0 = GPIO0_C7
+PWM6_M1 = GPIO4_C1
 PWM6_M2 = GPIO4_C5
+PWM7_IR_M0 = GPIO0_D0
+PWM7_IR_M1 = GPIO4_D4
+PWM7_IR_M2 = GPIO1_C3
 PWM7_IR_M3 = GPIO4_C6
+PWM7_M0 = PWM7_IR_M0
+PWM7_M1 = PWM7_IR_M1
+PWM7_M2 = PWM7_IR_M2
+PWM7_M3 = PWM7_IR_M3
 PWM8_M0 = GPIO3_A7
+PWM8_M1 = GPIO4_D0
+PWM8_M2 = GPIO3_D0
+PWM9_M0 = GPIO3_B0
+PWM9_M1 = GPIO4_D1
+PWM9_M2 = GPIO3_D1
+PWM10_M0 = GPIO3_A0
+PWM10_M1 = GPIO4_D3
 PWM10_M2 = GPIO3_D3
+PWM11_IR_M0 = GPIO3_A1
+PWM11_IR_M1 = GPIO4_B4
+PWM11_IR_M2 = GPIO1_C4
 PWM11_IR_M3 = GPIO3_D5
+PWM11_M0 = PWM11_IR_M0
+PWM11_M1 = PWM11_IR_M1
+PWM11_M2 = PWM11_IR_M2
+PWM11_M3 = PWM11_IR_M3
 PWM12_M0 = GPIO3_B5
-PWM13_M1 = GPIO4_B6
+PWM12_M1 = GPIO4_B5
 PWM13_M0 = GPIO3_B6
+PWM13_M1 = GPIO4_B6
 PWM13_M2 = GPIO1_B7
 PWM14_M0 = GPIO3_C2
 PWM14_M1 = GPIO4_B2
 PWM14_M2 = GPIO1_D6
 PWM15_IR_M0 = GPIO3_C3
 PWM15_IR_M1 = GPIO4_B3
+PWM15_IR_M2 = GPIO1_C6
 PWM15_IR_M3 = GPIO1_D7
+PWM15_M0 = PWM15_IR_M0
+PWM15_M1 = PWM15_IR_M1
+PWM15_M2 = PWM15_IR_M2
+PWM15_M3 = PWM15_IR_M3
 
 
 # SysFS pwm outputs, pwm channel and pin in first tuple
 pwmOuts = (
+    ((0, 0), PWM0_M0),
+    ((0, 0), PWM0_M1),
     ((0, 0), PWM0_M2),
+    ((0, 1), PWM1_M0),
+    ((0, 1), PWM1_M1),
     ((0, 1), PWM1_M2),
+    ((0, 2), PWM2_M0),
     ((0, 2), PWM2_M1),
+    ((0, 2), PWM2_M2),
+    ((0, 3), PWM3_IR_M0),
     ((0, 3), PWM3_IR_M1),
+    ((0, 3), PWM3_IR_M2),
+    ((0, 3), PWM3_IR_M3),
+    ((0, 4), PWM4_M0),
+    ((0, 4), PWM4_M1),
+    ((0, 5), PWM5_M0),
+    ((0, 5), PWM5_M1),
     ((0, 5), PWM5_M2),
+    ((0, 6), PWM6_M0),
+    ((0, 6), PWM6_M1),
     ((0, 6), PWM6_M2),
+    ((0, 7), PWM7_IR_M0),
+    ((0, 7), PWM7_IR_M1),
+    ((0, 7), PWM7_IR_M2),
     ((0, 7), PWM7_IR_M3),
     ((0, 8), PWM8_M0),
+    ((0, 8), PWM8_M1),
+    ((0, 8), PWM8_M2),
+    ((0, 9), PWM9_M0),
+    ((0, 9), PWM9_M1),
+    ((0, 9), PWM9_M2),
+    ((0, 10), PWM10_M0),
+    ((0, 10), PWM10_M1),
     ((0, 10), PWM10_M2),
+    ((0, 11), PWM11_IR_M0),
+    ((0, 11), PWM11_IR_M1),
+    ((0, 11), PWM11_IR_M2),
     ((0, 11), PWM11_IR_M3),
     ((0, 12), PWM12_M0),
+    ((0, 12), PWM12_M1),
     ((0, 13), PWM13_M0),
     ((0, 13), PWM13_M1),
     ((0, 13), PWM13_M2),
@@ -335,4 +664,20 @@ pwmOuts = (
 
 # SysFS analog inputs, Ordered as analog analogInId, device, and channel
 ADC_IN0 = 0
-analogIns = ((ADC_IN0, 0, 4),)
+ADC_IN1 = 1
+ADC_IN2 = 2
+ADC_IN3 = 3
+ADC_IN4 = 4
+ADC_IN5 = 5
+ADC_IN6 = 6
+ADC_IN7 = 7
+analogIns = (
+    (ADC_IN0, 0, 0),
+    (ADC_IN1, 0, 1),
+    (ADC_IN2, 0, 2),
+    (ADC_IN3, 0, 3),
+    (ADC_IN4, 0, 4),
+    (ADC_IN5, 0, 5),
+    (ADC_IN6, 0, 6),
+    (ADC_IN7, 0, 7),
+)