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Merge pull request #562 from fivetide/usb_hid
[Adafruit_Blinka-hackapet.git] / src / adafruit_blinka / microcontroller / ftdi_mpsse / mpsse / spi.py
1 # SPDX-FileCopyrightText: 2021 Melissa LeBlanc-Williams for Adafruit Industries
2 #
3 # SPDX-License-Identifier: MIT
4 """SPI Class for FTDI MPSSE"""
5 from adafruit_blinka.microcontroller.ftdi_mpsse.mpsse.pin import Pin
6 from adafruit_blinka.microcontroller.ftdi_mpsse.mpsse.url import (
7     get_ft232h_url,
8     get_ft2232h_url,
9 )
10
11 # pylint: disable=protected-access
12 class SPI:
13     """Custom SPI Class for FTDI MPSSE"""
14
15     MSB = 0
16
17     def __init__(self, spi_id=None):
18         # pylint: disable=import-outside-toplevel
19         from pyftdi.spi import SpiController
20
21         # pylint: enable=import-outside-toplevel
22
23         self._spi = SpiController(cs_count=1)
24         if spi_id is None:
25             self._spi.configure(get_ft232h_url())
26         else:
27             self._spi.configure(get_ft2232h_url(spi_id + 1))
28         self._port = self._spi.get_port(0)
29         self._port.set_frequency(100000)
30         self._port._cpol = 0
31         self._port._cpha = 0
32         # Change GPIO controller to SPI
33         Pin.mpsse_gpio = self._spi.get_gpio()
34
35     # pylint: disable=too-many-arguments,unused-argument
36     def init(
37         self,
38         baudrate=100000,
39         polarity=0,
40         phase=0,
41         bits=8,
42         firstbit=MSB,
43         sck=None,
44         mosi=None,
45         miso=None,
46     ):
47         """Initialize the Port"""
48         self._port.set_frequency(baudrate)
49         # FTDI device can only support mode 0 and mode 2
50         # due to the limitation of MPSSE engine.
51         # This means CPHA must = 0
52         self._port._cpol = polarity
53         if phase != 0:
54             raise ValueError("Only SPI phase 0 is supported by FT232H.")
55         self._port._cpha = phase
56
57     # pylint: enable=too-many-arguments
58
59     @property
60     def frequency(self):
61         """Return the current frequency"""
62         return self._port.frequency
63
64     def write(self, buf, start=0, end=None):
65         """Write data from the buffer to SPI"""
66         end = end if end else len(buf)
67         chunks, rest = divmod(end - start, self._spi.PAYLOAD_MAX_LENGTH)
68         for i in range(chunks):
69             chunk_start = start + i * self._spi.PAYLOAD_MAX_LENGTH
70             chunk_end = chunk_start + self._spi.PAYLOAD_MAX_LENGTH
71             self._port.write(buf[chunk_start:chunk_end])
72         if rest:
73             rest_start = start + chunks * self._spi.PAYLOAD_MAX_LENGTH
74             self._port.write(buf[rest_start:end])
75
76     # pylint: disable=unused-argument
77     def readinto(self, buf, start=0, end=None, write_value=0):
78         """Read data from SPI and into the buffer"""
79         end = end if end else len(buf)
80         buffer_out = [write_value] * (end - start)
81         result = self._port.exchange(buffer_out, end - start, duplex=True)
82         for i, b in enumerate(result):
83             buf[start + i] = b
84
85     # pylint: enable=unused-argument
86
87     # pylint: disable=too-many-arguments
88     def write_readinto(
89         self, buffer_out, buffer_in, out_start=0, out_end=None, in_start=0, in_end=None
90     ):
91         """Perform a half-duplex write from buffer_out and then
92         read data into buffer_in
93         """
94         out_end = out_end if out_end else len(buffer_out)
95         in_end = in_end if in_end else len(buffer_in)
96         result = self._port.exchange(
97             buffer_out[out_start:out_end], in_end - in_start, duplex=True
98         )
99         for i, b in enumerate(result):
100             buffer_in[in_start + i] = b
101
102     # pylint: enable=too-many-arguments