Merge pull request #25 from ladyada/master

[hackapet/Adafruit_Blinka.git] / src / busio.py

diff --git a/src/busio.py b/src/busio.py
index 69cbca03a3300c59a2064b849193096c8a91e15f..069e9bec91134024ba8347a9098bb6d2905b5962 100755 (executable)
--- a/src/busio.py
+++ b/src/busio.py
@@ -72,7 +72,9 @@ class SPI(Lockable):
             from machine import SPI as _SPI
         from microcontroller.pin import spiPorts
         for portId, portSck, portMosi, portMiso in spiPorts:
             from machine import SPI as _SPI
         from microcontroller.pin import spiPorts
         for portId, portSck, portMosi, portMiso in spiPorts:

-            if clock == portSck and MOSI == portMosi and MISO == portMiso:
+            if ((clock == portSck) and                   # Clock is required!
+                (MOSI == portMosi or MOSI == None) and   # But can do with just output
+                (MISO == portMiso or MISO == None)):      # Or just input

                 self._spi = _SPI(portId)
                 self._pins = (portSck, portMosi, portMiso)
                 break
                 self._spi = _SPI(portId)
                 self._pins = (portSck, portMosi, portMiso)
                 break