From: Drew Fustini Date: Wed, 21 Nov 2018 18:46:31 +0000 (+0000) Subject: Add SPI pins for BeagleBone Black X-Git-Tag: 0.3.0^2~2 X-Git-Url: https://git.ayoreis.com/Adafruit_Blinka-hackapet.git/commitdiff_plain/ff59972e7de13da1ee3c592b2ddf45e8fdd2225f Add SPI pins for BeagleBone Black Refer to header default pin modes http://beagleboard.org/static/images/cape-headers.png P9_17 (SPI0_CSO => CE0) enables peripheral device P9_18 (SPI0_D1 => MOSI) outputs data to peripheral device P9_21 (SPIO_DO => MISO) receives data from peripheral device P9_22 (SPI0_SCLK => SCLK) outputs clock signal Use config-pin to set pin mode for SPI pins https://github.com/beagleboard/bb.org-overlays/tree/master/tools/beaglebone-universal-io config-pin p9.17 spi_cs config-pin p9.18 spi config-pin p9.21 spi config-pin p9.22 spi_sclk --- diff --git a/src/adafruit_blinka/board/beaglebone_black.py b/src/adafruit_blinka/board/beaglebone_black.py index 337270d..d3fc75b 100644 --- a/src/adafruit_blinka/board/beaglebone_black.py +++ b/src/adafruit_blinka/board/beaglebone_black.py @@ -93,3 +93,14 @@ LED_USR3 = pin.USR3 SDA = pin.SDA SCL = pin.SCL + +# Refer to header default pin modes +# http://beagleboard.org/static/images/cape-headers.png +# P9_17 (SPI0_CSO => CE0) enables peripheral device +# P9_18 (SPI0_D1 => MOSI) outputs data to peripheral device +# P9_21 (SPIO_DO => MISO) receives data from peripheral device +# P9_22 (SPI0_SCLK => SCLK) outputs clock signal +CE0 = pin.CE0 +MOSI = pin.MOSI +MISO = pin.MISO +SCLK = pin.SCLK diff --git a/src/adafruit_blinka/microcontroller/beaglebone_black/pin.py b/src/adafruit_blinka/microcontroller/beaglebone_black/pin.py index ac20f95..0084da7 100644 --- a/src/adafruit_blinka/microcontroller/beaglebone_black/pin.py +++ b/src/adafruit_blinka/microcontroller/beaglebone_black/pin.py @@ -132,8 +132,32 @@ USR3 = Pin('USR3') SCL = Pin('P9_19') SDA = Pin('P9_20') +# Refer to header default pin modes +# http://beagleboard.org/static/images/cape-headers.png +# +# P9_17 (SPI0_CSO => CE0) enables peripheral device +# P9_18 (SPI0_D1 => MOSI) outputs data to peripheral device +# P9_21 (SPIO_DO => MISO) receives data from peripheral device +# P9_22 (SPI0_SCLK => SCLK) outputs clock signal +# +# Use config-pin to set pin mode for SPI pins +# https://github.com/beagleboard/bb.org-overlays/tree/master/tools/beaglebone-universal-io +# config-pin p9.17 spi_cs +# config-pin p9.18 spi +# config-pin p9.21 spi +# config-pin p9.22 spi_sclk +# +CE0 = Pin('P9_17') +MOSI = Pin('P9_18') +MISO = Pin('P9_21') +SCLK = Pin('P9_22') + +# example from RPi: +# spiPorts = ((0, SCLK, MOSI, MISO), (1, SCLK_1, MOSI_1, MISO_1)) # ordered as spiId, sckId, mosiId, misoId -spiPorts = () +spiPorts = ( + (0, SCLK, MOSI, MISO) +) # ordered as uartId, txId, rxId uartPorts = (