Untangle code and remove pylint disables

[Adafruit_Blinka-hackapet.git] / src / adafruit_blinka / microcontroller / rp2040 / spi.py

diff --git a/src/adafruit_blinka/microcontroller/rp2040/spi.py b/src/adafruit_blinka/microcontroller/rp2040/spi.py
index e876a38b575d64ea4a976e7d13ea7793d1cfe9cf..bf59dd7991c7b6dda3f1fdb6de6b8889649c1bfe 100644 (file)
--- a/src/adafruit_blinka/microcontroller/rp2040/spi.py
+++ b/src/adafruit_blinka/microcontroller/rp2040/spi.py
@@ -1,12 +1,18 @@
+# SPDX-FileCopyrightText: 2021 Melissa LeBlanc-Williams for Adafruit Industries
+#
+# SPDX-License-Identifier: MIT

 """SPI Class for RP2040"""
 from machine import SPI as _SPI
 from machine import Pin
 from microcontroller.pin import spiPorts
 
 """SPI Class for RP2040"""
 from machine import SPI as _SPI
 from machine import Pin
 from microcontroller.pin import spiPorts
 

+

 # pylint: disable=protected-access, no-self-use
 class SPI:
     """Custom SPI Class for RP2040"""
 
 # pylint: disable=protected-access, no-self-use
 class SPI:
     """Custom SPI Class for RP2040"""
 

+    MSB = _SPI.MSB
+

     def __init__(self, clock, MOSI=None, MISO=None, *, baudrate=1000000):
         self._frequency = baudrate
         for portId, portSck, portMosi, portMiso in spiPorts:
     def __init__(self, clock, MOSI=None, MISO=None, *, baudrate=1000000):
         self._frequency = baudrate
         for portId, portSck, portMosi, portMiso in spiPorts: