[BBB] move special function pin-names to board definition file

[Adafruit_Blinka-hackapet.git] / src / adafruit_blinka / board / beaglebone_black.py

diff --git a/src/adafruit_blinka/board/beaglebone_black.py b/src/adafruit_blinka/board/beaglebone_black.py
index 5658ffb8295a15aef9ae603db063139df9949eb9..36446f738bd43d9a95109e1fd7c4a4d76f91916c 100644 (file)
--- a/src/adafruit_blinka/board/beaglebone_black.py
+++ b/src/adafruit_blinka/board/beaglebone_black.py
@@ -92,27 +92,73 @@ LED_USR3 = pin.USR3
 # SCLK_1 = pin.D21
 # SCK_1 = pin.D21
 
-SDA = pin.SDA
-SCL = pin.SCL
+SDA = pin.P9_19
+SCL = pin.P9_20
 
 # Refer to header default pin modes
 # http://beagleboard.org/static/images/cape-headers.png
+#
 # P9_17 (SPI0_CSO => CE0) enables peripheral device
 # P9_18 (SPI0_D1 => MOSI) outputs data to peripheral device
 # P9_21 (SPIO_DO => MISO) receives data from peripheral device
 # P9_22 (SPI0_SCLK => SCLK) outputs clock signal
-CE0 = pin.CE0
-MOSI = pin.MOSI
-MISO = pin.MISO
-SCLK = pin.SCLK
-#CircuitPython naming convention for SPI Clock
-SCK = pin.SCK
+#
+# Use config-pin to set pin mode for SPI pins
+# https://github.com/beagleboard/bb.org-overlays/tree/master/tools/beaglebone-universal-io
+# config-pin p9.17 spi_cs
+# config-pin p9.18 spi
+# config-pin p9.21 spi
+# config-pin p9.22 spi_sclk
+#
+CE0 = pin.P9_17
+MOSI = pin.P9_18
+MISO = pin.P9_21
+SCLK = pin.P9_22
+# CircuitPython naming convention for SPI Clock
+SCK = SCLK
 
-# SPI1 pins
+# Pins for SPI1
+# refer to:
 # http://beagleboard.org/static/images/cape-headers-spi.png
-CE1 = pin.CE1
-MOSI_1 = pin.MOSI_1
-MISO_1 = pin.MISO_1
-SCLK_1 = pin.SCLK_1
-#CircuitPython naming convention for SPI Clock
-SCK_1 = pin.SCK_1
+#
+# CE1 P9.28 SPI1_CS0
+# MISO_1 P9.29 SPI1_D0
+# MOSI_1 P9.30 SPI1_D1
+# SCLK_1 P9.31 SPI_SCLK
+#
+# SPI1 conflicts with HDMI Audio (McASP)
+#
+# Refer to:
+# https://elinux.org/Beagleboard:BeagleBoneBlack_Debian#U-Boot_Overlays
+#
+# To Disable HDMI AUDIO, uncomment this line in /boot/uEnv.txt:
+# disable_uboot_overlay_audio=1
+#
+# Set pin modes for SPI1 with:
+#
+# config-pin p9.28 spi1_cs
+# config-pin p9.29 spi1
+# config-pin p9.30 spi1
+# config-pin p9.31 spi_sclk
+CE1 = pin.P9_28
+MOSI_1 = pin.P9_29
+MISO_1 = pin.P9_30
+SCLK_1 = pin.P9_31
+# CircuitPython naming convention for SPI Clock
+SCK_1 = SCLK_1
+
+
+# ordered as spiId, sckId, mosiId, misoId
+spiPorts = (
+    (0, SCLK, MOSI, MISO),
+    (1, SCLK_1, MOSI_1, MISO_1)
+)
+
+# ordered as uartId, txId, rxId
+uartPorts = (
+    (),
+)
+
+i2cPorts = (
+    (2, SCL, SDA),
+)