-# SPDX-FileCopyrightText: 2021 Melissa LeBlanc-Williams for Adafruit Industries
+# SPDX-FileCopyrightText: 2022 ShangYun
#
# SPDX-License-Identifier: MIT
"""A Pin class for use with Rockchip RK3588."""
# UART
-UART2_TX = GPIO0_B5
-UART2_RX = GPIO0_B6
+UART0_TX_M2 = GPIO4_A3
+UART0_RX_M2 = GPIO4_A4
+UART1_TX_M1 = GPIO1_B6
+UART1_RX_M1 = GPIO1_B7
+UART2_TX_M0 = GPIO0_B5
+UART2_RX_M0 = GPIO0_B6
+UART2_TX_M2 = GPIO3_B1
+UART2_RX_M2 = GPIO3_B2
+UART3_TX_M0 = GPIO1_C1
+UART3_RX_M0 = GPIO1_C0
+UART3_TX_M1 = GPIO3_B5
+UART3_RX_M1 = GPIO3_B6
+UART4_TX_M2 = GPIO1_B3
+UART4_RX_M2 = GPIO1_B2
+UART7_TX_M1 = GPIO3_C0
+UART7_RX_M1 = GPIO3_C1
+UART7_TX_M2 = GPIO1_B5
+UART7_RX_M2 = GPIO1_B4
+
+# ordered as uartId, txId, rxId
+uartPorts = (
+ (0, UART0_TX_M2, UART0_RX_M2),
+ (1, UART1_TX_M1, UART1_RX_M1),
+ (2, UART2_TX_M0, UART2_RX_M0),
+ (2, UART2_TX_M2, UART2_RX_M2),
+ (3, UART3_TX_M0, UART3_RX_M0),
+ (3, UART3_TX_M1, UART3_RX_M1),
+ (4, UART4_TX_M2, UART4_RX_M2),
+ (7, UART7_TX_M1, UART7_RX_M1),
+ (7, UART7_TX_M2, UART7_RX_M2),
+)
+
# I2C
-I2C1_SCL = GPIO0_B5
-I2C1_SDA = GPIO0_B6
+I2C0_SCL_M1 = GPIO4_C5
+I2C0_SDA_M1 = GPIO4_C6
+I2C1_SCL_M0 = GPIO0_B5
+I2C1_SDA_M0 = GPIO0_B6
+I2C1_SCL_M4 = GPIO1_B1
+I2C1_SDA_M4 = GPIO1_B2
+I2C3_SCL_M0 = GPIO1_C1
+I2C3_SDA_M0 = GPIO1_C0
+I2C3_SCL_M1 = GPIO3_B7
+I2C3_SDA_M1 = GPIO3_C0
+I2C4_SCL_M3 = GPIO1_A3
+I2C4_SDA_M3 = GPIO1_A2
+I2C6_SCL_M3 = GPIO4_B1
+I2C6_SDA_M3 = GPIO4_B0
+I2C7_SCL_M3 = GPIO4_B2
+I2C7_SDA_M3 = GPIO4_B3
+I2C8_SCL_M2 = GPIO1_D6
+I2C8_SDA_M2 = GPIO1_D7
+I2C8_SCL_M4 = GPIO3_C2
+I2C8_SDA_M4 = GPIO3_C3
+I2C5_SDA_M3 = GPIO1_B7
+I2C5_SCL_M3 = GPIO1_B6
+
+# ordered as i2cId, sclId, sdaId
+i2cPorts = (
+ (0, I2C0_SCL_M1, I2C0_SDA_M1),
+ (1, I2C1_SCL_M0, I2C1_SDA_M0),
+ (1, I2C1_SCL_M4, I2C1_SDA_M4),
+ (3, I2C3_SCL_M0, I2C3_SDA_M0),
+ (3, I2C3_SCL_M1, I2C3_SDA_M1),
+ (4, I2C4_SCL_M3, I2C4_SDA_M3),
+ (5, I2C5_SCL_M3, I2C5_SDA_M3),
+ (7, I2C7_SCL_M3, I2C7_SDA_M3),
+ (8, I2C8_SCL_M2, I2C8_SDA_M2),
+ (8, I2C8_SCL_M4, I2C8_SDA_M4),
+)
# SPI
-SPI3_MISO = GPIO4_C4
-SPI3_MOSI = GPIO4_C5
-SPI3_SCK = GPIO4_C6
-SPI3_SCLK = SPI3_SCK
+SPI0_MOSI_M2 = GPIO1_B2
+SPI0_MISO_M2 = GPIO1_B1
+SPI0_CLK_M2 = GPIO1_B3
+SPI0_SCLK_M2 = SPI0_CLK_M2
+SPI0_CS0_M2 = GPIO1_B4
+SPI0_CS1_M2 = GPIO1_B5
+
+SPI0_MOSI_M1 = GPIO4_A1
+SPI0_MISO_M1 = GPIO4_A0
+SPI0_SCLK_M1 = GPIO4_A2
+SPI0_CS0_M1 = GPIO4_B2
+
+SPI1_MOSI_M1 = GPIO3_B7
+SPI1_MISO_M1 = GPIO3_C0
+SPI1_CLK_M1 = GPIO3_C1
+SPI1_SCLK_M1 = SPI1_CLK_M1
+SPI1_CS0_M1 = GPIO3_C2
+SPI1_CS1_M1 = GPIO3_C3
+
+SPI3_MISO_M0 = GPIO4_C4
+SPI3_MOSI_M0 = GPIO4_C5
+SPI3_SCK_M0 = GPIO4_C6
+SPI3_SCLK_M0 = SPI3_SCK_M0
+
+SPI4_MISO_M0 = GPIO1_C0
+SPI4_MOSI_M0 = GPIO1_C1
+SPI4_SCK_M0 = GPIO1_C2
+SPI4_SCLK_M0 = SPI4_SCK_M0
+
+# ordered as spiId, sckId, mosiId, misoId
+spiPorts = (
+ (0, SPI0_SCLK_M2, SPI0_MOSI_M2, SPI0_MISO_M2),
+ (0, SPI0_SCLK_M1, SPI0_MOSI_M1, SPI0_MISO_M1),
+ (1, SPI1_SCLK_M1, SPI1_MOSI_M1, SPI1_MISO_M1),
+ (3, SPI3_SCLK_M0, SPI3_MOSI_M0, SPI3_MISO_M0),
+ (4, SPI4_SCLK_M0, SPI4_MOSI_M0, SPI4_MISO_M0),
+)
+
+# PWM
+PWM0_M2 = GPIO1_A2
+PWM1_M2 = GPIO1_A3
+PWM2_M1 = GPIO3_B1
+PWM3_IR_M1 = GPIO3_B2
+PWM5_M2 = GPIO4_C4
+PWM6_M2 = GPIO4_C5
+PWM7_IR_M3 = GPIO4_C6
+PWM8_M0 = GPIO3_A7
+PWM10_M2 = GPIO3_D3
+PWM11_IR_M3 = GPIO3_D5
+PWM12_M0 = GPIO3_B5
+PWM13_M1 = GPIO4_B6
+PWM13_M0 = GPIO3_B6
+PWM13_M2 = GPIO1_B7
+PWM14_M0 = GPIO3_C2
+PWM14_M1 = GPIO4_B2
+PWM14_M2 = GPIO1_D6
+PWM15_IR_M0 = GPIO3_C3
+PWM15_IR_M1 = GPIO4_B3
+PWM15_IR_M3 = GPIO1_D7
+
+
+# SysFS pwm outputs, pwm channel and pin in first tuple
+pwmOuts = (
+ ((0, 0), PWM0_M2),
+ ((0, 1), PWM1_M2),
+ ((0, 2), PWM2_M1),
+ ((0, 3), PWM3_IR_M1),
+ ((0, 5), PWM5_M2),
+ ((0, 6), PWM6_M2),
+ ((0, 7), PWM7_IR_M3),
+ ((0, 8), PWM8_M0),
+ ((0, 10), PWM10_M2),
+ ((0, 11), PWM11_IR_M3),
+ ((0, 12), PWM12_M0),
+ ((0, 13), PWM13_M0),
+ ((0, 13), PWM13_M1),
+ ((0, 13), PWM13_M2),
+ ((0, 14), PWM14_M0),
+ ((0, 14), PWM14_M1),
+ ((0, 14), PWM14_M2),
+ ((0, 15), PWM15_IR_M0),
+ ((0, 15), PWM15_IR_M1),
+ ((0, 15), PWM15_IR_M3),
+)
+
+# SysFS analog inputs, Ordered as analog analogInId, device, and channel
+ADC_IN0 = 0
+analogIns = ((ADC_IN0, 0, 4),)