2 Pin definitions for the Beaglebone PocketBeagle.
5 https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#figure-42-expansion-header-popular-functions---color-coded
7 from adafruit_blinka.microcontroller.am335x import pin
9 # initial pins, to mimic bonescript demo
26 # P1_17 = AIN 1.8V REF-
27 # P1_18 = AIN 1.8V REF+
91 # Refer to header default pin modes
92 # https://raw.githubusercontent.com/wiki/beagleboard/pocketbeagle/images/PocketBeagle_pinout.png
95 # P2_11 (I2C1_SDA => SDA_1) data signal
96 # P2_9 (I2C1_SCL => SCL_1) clock signal
101 # P1_26 (I2C2_SDA => SDA_2) data signal
102 # P1_28 (I2C2_SCL => SCL_2) clock signal
107 # P1_6 (SPI0_CSO => CE0) enables peripheral device
108 # P1_12 (SPI0_MOSI => MOSI) outputs data to peripheral device
109 # P1_10 (SPIO_MISO => MISO) receives data from peripheral device
110 # P1_8 (SPI0_CLK => SCLK) outputs clock signal
115 # CircuitPython naming convention for SPI Clock
119 # P2_31 (SPI1_CS1 => CE1) enables peripheral device
120 # P2_25 (SPI1_MOSI => MOSI) outputs data to peripheral device
121 # P2_27 (SPI1_MISO => MISO) receives data from peripheral device
122 # P2_29 (SPI1_CLK => SCLK) outputs clock signal
127 # CircuitPython naming convention for SPI Clock
140 # pins already in use by SPI0
149 # ordered as spiId, sckId, mosiId, misoId
151 (0, SCLK, MOSI, MISO),
152 (1, SCLK_1, MOSI_1, MISO_1),
155 # ordered as uartId, txId, rxId